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Inference

TOPS

ActivePublished: 29 August 2026Updated: 29 August 2026Published
Key innovation
Reduced an AI accelerator's raw compute throughput to a single number (trillions of operations per second), enabling quick comparison of inference chips, especially edge ones.
Category
Inference
Abstraction level
Primitive
Operation level
InferenceServingDeployment
Use cases
Comparing performance of AI accelerators and NPUsSelecting hardware for edge AI inferenceSpecifying compute modules for robotics and autonomous vehiclesAssessing energy efficiency via the TOPS/W metricMarketing and datasheets of AI chips, smartphones and NPU-equipped laptops

How it works

TOPS is derived from an accelerator's hardware specification, not from a measurement. The basic formula is: TOPS = (number of MAC units × clock frequency × 2) / 10^12, where the factor of 2 reflects that each MAC operation comprises one multiply and one add. Adding more MAC units or higher clocks raises TOPS. Because compute units process lower-precision data faster (e.g. twice as many INT4 as INT8 operations per cycle), the TOPS value increases as precision drops. Structured sparsity techniques let the chip skip zero-valued weights, so vendors additionally report 'sparse TOPS'. Real inference performance, however, depends not only on TOPS but also on memory bandwidth, model size, and utilization efficiency, which is why peak TOPS is an upper bound rather than a guarantee.

Problem solved

The AI accelerator market needed a single, easy-to-communicate number describing an inference chip's raw compute power, to compare hardware and estimate whether it can run a given model. TOPS fills that role, but also exposes a problem: without stating the precision (INT8/INT4/FP) and conditions (sparsity), a single number can be misleading and fails to reflect real-world performance.