Server CPU · serves as: Compute, High-level compute.
Which group NVIDIA Vera CPU belongs to and how it is built
This subcategory covers server- and data-center-class central processing units (CPUs). In AI and robotics contexts they act as the host processor managing the operating system, task orchestration and data feeding to GPU accelerators. They commonly feature high-bandwidth multi-channel memory subsystems and coherent interconnects to GPUs.
A component type covering server-class central processing units — both x86- and Arm-based. They feature high core counts, extensive memory subsystems and coherent interfaces to accelerators, serving as the host processor in AI compute platforms.
A design class covering many-core server processors using the Arm architecture (licensed Neoverse or custom core designs). They are typically paired with GPU accelerators over high-bandwidth coherent links and fed by high-bandwidth LPDDR memory.
Basic physical properties of NVIDIA Vera CPU — dimensions, weight and materials
Other hardware parts related to NVIDIA Vera CPU
NVIDIA Vera is a next-generation server CPU, the successor to the Grace chip. It packs 88 NVIDIA-designed Arm cores ("Olympus") — the company's first custom core design in years, replacing the off-the-shelf Arm Neoverse V2 cores used in Grace. Using NVIDIA Spatial Multithreading, the chip exposes 176 threads.
Vera offers LPDDR5X memory (SOCAMM modules) with up to 1.5 TB capacity and up to 1.2 TB/s bandwidth (8× 128-bit controllers), 2 MB of L2 cache per core and 164 MB of shared L3 cache. It connects to the Rubin GPU over a coherent NVLink-C2C link at 1.8 TB/s — double that of Grace (900 GB/s). External interfaces are PCIe Gen6 / CXL 3.1 (96 lanes), and power draw sits in the 250–450 W range.
Vera is the CPU element of the Vera Rubin platform. The rack-scale Vera Rubin NVL144 configuration runs 36 Vera CPUs and 144 Rubin GPUs (72 packages). According to NVIDIA figures, Vera delivers roughly 1.8× higher performance on agentic workloads and about 1.5× on data processing versus Grace (SPEC CPU 2026 measurements on NVIDIA proxy workloads).
The chip was announced as part of the roadmap at GTC 2025, the Vera Rubin superchip was physically shown in late 2025, and the Vera Rubin NVL72 platform debuted at CES in early 2026. Volume production is planned for the second half of 2026. Vera is a six-die design (a monolithic compute die plus memory/IO chiplets on a shared interposer).
