AI Accelerator · serves as: AI acceleration, AI Inference.
Which group OpenAI Jalapeño belongs to and how it is built
Compute Modules is a subcategory of hardware components that provide processing power for robotic systems. It encompasses onboard computers, single-board computers (SBCs), AI accelerators, embedded processors, GPU/NPU compute modules, and other units responsible for processing sensor data and executing control logic. These modules form the foundation of modern autonomous, humanoid, and perception-capable robots.
An AI Accelerator is a specialized hardware component designed for efficient execution of artificial intelligence computations, particularly neural network inference, computer vision processing, and sensor data analysis. In robotics, AI accelerators are used to run perception models, object recognition, image segmentation, planning, and other tasks that require high computational throughput under constrained power budgets. They may take the form of dedicated NPU, TPU, VPU, or GPU chips, or specialized embedded modules.
A data-center AI accelerator card is a design class describing the construction of high-performance compute processors (GPUs/accelerators) intended for mounting in data-center servers. It is characterised by: an SXM form factor (a module soldered onto an HGX/DGX baseboard) or a dual-slot PCIe card; high-bandwidth memory (HBM2e/HBM3/HBM3e) integrated on-package; dedicated GPU-to-GPU interconnects (NVLink, Infinity Fabric) with hundreds of GB/s of bandwidth; high TDP (350–1000 W) requiring air or liquid cooling; support for virtualisation/partitioning (MIG) and low-precision compute formats (FP8/FP16/BF16/INT8). The class includes designs such as NVIDIA H100/H200/A100, AMD Instinct MI300, Google TPU, and Intel Gaudi. It describes physical construction and configuration, not the functional role (which is given by the component type "AI Accelerator").
OpenAI Jalapeño is OpenAI's first in-house AI accelerator, unveiled on 24 June 2026 together with Broadcom and described by the company as an "Intelligence Processor". It is an ASIC designed from the ground up exclusively for large-language-model inference, rather than a general-purpose accelerator adapted from earlier AI workloads. The architecture is informed by OpenAI's understanding of LLM internals — kernels, data movement, networking, and the serving patterns of products such as ChatGPT, Codex, and the API.
The chip was developed from design to tape-out in nine months — which OpenAI describes as one of the fastest development cycles for an advanced ASIC. Broadcom handles the silicon implementation and networking technologies (including Tomahawk), while Celestica provides board, rack, and system integration. Engineering samples of Jalapeño are already running in the lab at target frequency and power, executing ML workloads including the GPT-5.3-Codex-Spark model.
OpenAI states that early testing indicates performance per watt substantially better than the current state of the art, but final measurements and a detailed technical report are to be published later. Jalapeño is the first chip in a multi-generation compute platform, with initial deployment planned for the end of 2026 at gigawatt scale, alongside data-center partners including Microsoft. The company has not officially disclosed the manufacturing process node or detailed performance figures.
