NVIDIA Hopper
NVIDIA Hopper is a data-center-class GPU architecture, unveiled in March 2022 at NVIDIA GTC and named after computer scientist and U.S. Navy rear admiral Grace Hopper. The Hopper-based H100 is built on the TSMC 4N process (5 nm class), has about 80 billion transistors and a die size of roughly 814 mm2.
Hopper's most important innovation is the Transformer Engine - a mechanism that dynamically lowers computation precision (e.g. from FP16 to the faster FP8), significantly accelerating training and inference of large language models. The architecture also introduced a new generation of NVLink with higher bandwidth, HBM3 memory (up to 80 GB and about 3 TB/s in the H100), next-generation Tensor Cores, MIG technology and confidential computing.
Hopper powers NVIDIA's key AI accelerators: the H100 (launched Q3 2022), the H200 (with HBM3e memory) and the GH200 Grace Hopper superchip, combining an H100 GPU with a 72-core Grace CPU. Hopper's successor is the Blackwell architecture. Hopper became the de-facto hardware standard for training modern generative-AI models in data centers.
Classification
AI Accelerator · serves as: AI acceleration, AI Inference, Compute.
Which group NVIDIA Hopper belongs to and how it is built
This subcategory groups integrated circuits designed to accelerate AI computation in data centers: NVIDIA H100/B200, Google TPU, AWS Trainium/Inferentia, Meta MTIA, Groq LPU, Cerebras WSE. Common properties: high-bandwidth HBM memory, low-precision modes (FP16/BF16/FP8/MX8/MX4/INT8/INT4), scalability to rack-scale (hundreds of chips in a single scale-up domain), liquid cooling, integration with ML frameworks (PyTorch, JAX, Triton, vLLM). This contrasts with hardwareSubcategory.ai-soc-edge-ai-soc where the criteria are the opposite (low power, no HBM, on-device inference).
An AI Accelerator is a specialized hardware component designed for efficient execution of artificial intelligence computations, particularly neural network inference, computer vision processing, and sensor data analysis. In robotics, AI accelerators are used to run perception models, object recognition, image segmentation, planning, and other tasks that require high computational throughput under constrained power budgets. They may take the form of dedicated NPU, TPU, VPU, or GPU chips, or specialized embedded modules.
A data-center AI accelerator card is a design class describing the construction of high-performance compute processors (GPUs/accelerators) intended for mounting in data-center servers. It is characterised by: an SXM form factor (a module soldered onto an HGX/DGX baseboard) or a dual-slot PCIe card; high-bandwidth memory (HBM2e/HBM3/HBM3e) integrated on-package; dedicated GPU-to-GPU interconnects (NVLink, Infinity Fabric) with hundreds of GB/s of bandwidth; high TDP (350–1000 W) requiring air or liquid cooling; support for virtualisation/partitioning (MIG) and low-precision compute formats (FP8/FP16/BF16/INT8). The class includes designs such as NVIDIA H100/H200/A100, AMD Instinct MI300, Google TPU, and Intel Gaudi. It describes physical construction and configuration, not the functional role (which is given by the component type "AI Accelerator").
Relations
Other hardware parts related to NVIDIA Hopper
A data-center AI accelerator based on the NVIDIA Hopper architecture (2022): 80 GB HBM3, 700 W, 4th-generation Tensor Cores with FP8 and Transformer Engine. The standard GPU for LLM training and hyperscale AI inference.
A data-center AI accelerator based on the NVIDIA Hopper architecture (2023): the first GPU with HBM3e memory — 141 GB at 4.8 TB/s. Same compute as the H100 but nearly double the memory capacity and bandwidth for training and inference of large language models.
NVIDIA's AI GPU architecture (2024) and the B200 chip: 208B transistors, two dies connected at 10 TB/s, TSMC 4NP, 192 GB HBM3e, 2nd-gen Transformer Engine (FP4) and 5th-gen NVLink; the basis of GB200 systems.
